The present invention is related to switching devices. More particularly, the present invention provides a structure and a method for forming a non-volatile resistive switching memory device having desirable characteristics.
The success of semiconductor devices has been mainly driven by an intensive transistor down-scaling process. However, as field effect transistor (FET) approach sizes less than 100 nm, problems such as short channel effect start to prevent proper device operation. Moreover, transistor based memories such as those commonly known as Flash can have additional performance degradations as device sizes shrink. For example, a high voltage is usually required for programming of a Flash memory device. The high voltage can result in dielectric breakdown and increases the possibility of disturb mechanisms. Flash memory is one type of non-volatile memory device.
Other non-volatile random access memory (RAM) devices such as ferroelectric RAM (Fe RAM), magneto-resistive RAM (MRAM), organic RAM (ORAM), and phase change RAM (PCRAM), among others, have been explored as next generation memory devices. These devices often require new materials and device structures coupled with a silicon-based device to form a memory cell. However, these new memory cells usually lack one or more key attributes, which have prevented their widespread adoption in high volume products. For example, Fe-RAM and MRAM devices have fast switching characteristics, that is, the time to switch between a “0” and a “1,” and good programming endurance, but their fabrication is not compatible with standard silicon fabrication, and the resulting memory cell may not be easy to scale to small sizes. Switching for a PCRAM device uses Joules heating, which inherently has high power consumption. Organic RAM or ORAM is incompatible with large volume silicon-based fabrication and device reliability is usually poor.
From the above, an improved semiconductor memory device that can scales to smaller dimension and techniques are therefore desirable.